Logic device/transceiver/encoder

The MC10E/100E016 is a high-speed synchronous, presettable, cascadable 8-bit binary counter. Same structure and operation as the MC10H016 in the MECL 10H family, scalable to 8 bits, as shown in the logic symbol. The counter has internal feedback to the TCbar gated by the TCLD (Terminal Count Load) pin. When TCLD is low (or left open, in which case it is pulled low by an internal pull-down), TCbar feedback is disabled, counting continues, and TCbar goes low, indicating a unity state. When TCLD is high, TC causes the counter to automatically reload when TCbar = low, thus acting like a programmable counter. The Qn output does not need to be terminated for the counting function to function properly. To minimize noise and power dissipation, unused Q outputs should be left unterminated. The 100 Series includes temperature compensation.

8-Bit General Purpose Shift/Storage Register with 3-State Output 20-PDIP 0 to 70