Logic device/transceiver/encoder

6-Channel, 2V to 6V Inverter 14-SOIC with Open-Drain Output -40 to 125

6-Channel 4.5V to 5.5V Inverter with TTL Compatible CMOS Inputs 14-TSSOP -55 to 125

6-Channel, 4.5V to 5.5V Inverter with TTL Compatible CMOS Inputs 14-SO -40 to 125

The NB3V8312C is a high-performance, low-skew LVCMOS fan-out buffer that distributes 12 ultra-low-jitter clocks based on LVCMOS/LVTTL inputs up to 250 MHz. Twelve LVCMOS output pins drive 50Ω series or parallel terminated transmission lines. These outputs can also be disabled as high impedance (tri-state) via the OE input, or enabled when high. NB3V8312C provides an enable input, CLK_EN pin, which simultaneously enables the clock output, or disables it in a low state. Because this input is internally synchronized to the input clock and only changes when the input is low, there is no output glitch or runt pulse generation. Separate VDD core and VDDO output supplies allow the output buffer to operate at a supply voltage equal to VDD (VDD = VDDO) or lower. Dual-supply operation enables lower power consumption and output level compatibility compared to single-supply operation. The VDD core supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, and the VDDO output supply voltage can be set to 3.3 V, 2.5 V, or 1.8 V, but there is a constraint that VDD >/= VDDO.

The high-performance silicon-gate CMOS MC74HC541A has the same pin-out as the LS541. The device inputs are compatible with standard CMOS outputs. An external pull-up resistor makes it compatible with LSTTL output. The HC541A is an octal non-inverting buffer/line driver/line receiver for 3-state memory address drivers, clock drivers, and other bus-oriented systems. The device's input and output are on opposite sides of the encapsulation and has two AND active-low outputs enabled. The HC541A is functionally similar to the HC540A which has an inverting output.

Octal General Interface Bus Transceiver 20-SOIC 0 to 70

The VHCT240A is an advanced high-speed CMOS octal bus transceiver fabricated in silicon-gate CMOS technology. It achieves high-speed operation similar to the equivalent bipolar Schottky TTL while maintaining low power consumption in CMOS. The VHCT240A is an inverting 3-state buffer with two active-low output enable pins. These devices are designed for use as 3-state memory address drivers, clock drivers, and bus transmitter/receivers. The input protection circuit ensures that 0 to 7V can be applied to the input and output (Note 1) pins regardless of the supply voltage. These circuits prevent the device from being damaged due to power supply and input/output voltage mismatch. This device can be used to interface 5V to 3V systems and two power systems such as backup batteries.