Logic device/transceiver/encoder

2-Channel, 2-Input, 1.65V to 5.5V NOR Gate 8-VSSOP -40 to 125

16-Bit Bus Transceiver with 3-State Output 48-SSOP -40 to 85

The MC14490 is built using complementary MOS enhancement mode devices to eliminate excessive level changes when interfacing with mechanical contacts. The digital contact bounce eliminator circuit takes an input signal from a bounce contact and generates a clear digital signal four clock periods after the input is stable. The bounce eliminator circuit will remove bounce on the "closed" and "open" contact housings. The running clock of the MC14490 is derived from an internal R-C oscillator that requires only one external capacitor to adjust for the desired running frequency (bounce delay). The clock can also be driven from an external clock source or from another MC14490's oscillator (see Figure 5). Note: Immediately after power-up, the output of the MC14490 goes into an indeterminate state.