Logic device/transceiver/encoder

The NB100LVEP222 is a low-skew 2:1:15 differential divide-by-1/divide-by-2 ECL fanout buffer for clock distribution. The LVECL/LVPECL input signal pair can be used in a differential configuration or single-ended (the VBB output reference is bypassed in parallel with an unused pair of inputs). One of two fully differential clock inputs can be selected. Each of the four output groups of 2, 3, 4 and 6 differential pairs can be independently configured to fan out at 1X or 1/2X the input frequency. Data can also be distributed when the output group is configured in divide-by-1 mode. The LVEP222 specifically guarantees low output-to-output skew. Optimized design, layout, and handling minimize skew within the device and from lot to lot. This device is an improved version of the MC100LVE222 with higher speed capability and reduced skew. The fsel pin and CLK_Sel pin are asynchronous control inputs. Any change can result in an indeterminate output state, requiring an MR pulse to resynchronize any 1/2X output (see Figure 4). Unused output pairs should be left unterminated (open circuit) to reduce power dissipation and switching noise. The NB100LVEP222, like most ECL devices, can operate in LVPECL mode from a positive VCC/VCC0 supply. Therefore, using the LVEP222 in 2.5/3.3 V systems enables high-performance clock distribution. In series or Thevenin lines in a PECL environment, terminations are often used because they do not require an additional power supply. For more information on using PECL, designers should refer to application note AN1406/D. For SPICE signals, refer to Application Note AN1560/D. Only the VBB pin, the internally generated supply voltage, is provided for this device. In the case of single-ended LVPECL inputs, tie the unused differential input to VBB as the switch reference voltage. VBB can also re-bias the AC-coupled input. When used, decouple VBB and VCC/VCC0 through a 0.01 uF capacitor and limit the current source or sink to 0.5 mA. VBB should be left open when not in use.

ON Semiconductor 74FST3126 is a quad high performance switch. The device is CMOS TTL compatible when operating between 4 and 5.5 V. The device has very low RON and adds almost zero propagation delay. The device does not add noise or ground bounce to the system. The device contains four independent 1-bit switches with separate output/enable (OE) pins. When OE is high, port A is connected to port B. If OE is low, the switch is high Z.