Logic device/transceiver/encoder

Enhanced Product 4-Channel, 2-Input, 4.5V to 5.5V AND Gate with TTL Compatible CMOS Inputs 14-SOIC -55 to 125

4-Channel, 2-Input, 2V to 6V NAND Gate 14-SOIC -40 to 85

4-Channel, 2-Input, 2V to 5.5V NAND Gate 14-SSOP -40 to 125

4-Bit Magnitude Comparator 16-SOIC -55 to 125

The MC14514B and MC14515B are two output options for a 4-16 line decoder with latching inputs. The MC14514B (output active high option) displays a logic "1" on the selected output, while the MC14515B (output active low option) displays a logic "0" on the selected output. A latch is an R-S type flip-flop that holds the last input data displayed before the strobe transition from '1' to '0'. These high-level and low-level options of the 4-bit latch/4-16 line decoder are built using N-channel and P-channel enhancement mode devices in a monolithic structure. A latch is an R-S type flip-flop where data is received, decoded, and presented at the output when a signal is incident on the strobe input. These complementary circuits are primarily used in decoding applications requiring low power consumption and/or high noise immunity.

16-Bit Bus Transceiver with 3-State Output 48-SSOP -40 to 85

18-Bit Universal Bus Driver with 3-State Outputs 56-TSSOP -40 to 85