Memory chip

The CAT25M01 is an EEPROM serial 1-Mb SPI device internally organized as 128Kx8 bits. It has a 256-byte page write cache and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a chip select (CS) input. Additionally, the required bus signals are the clock input (SCK), data input (SI) and data output (SO) lines. The hold input can be used to suspend any serial communication with the CAT25M01 device. The device features software and hardware write protection, including partial and full array protection. On-chip ECC (Error Correction Code) makes the device suitable for high-reliability applications.