Logic device/transceiver/encoder

The MC14516B Synchronous Up/Down Binary Counter is constructed using MOS P-channel and N-channel enhancement mode devices in a monolithic structure. This counter can be preset by applying the desired binary value to the preset inputs (P0, P1, P2, P3) and then setting preset enable (PE) high. The counting direction is controlled by applying a high level (for up counting) or a low level (for counting down) to the UP/DOWN input. The state of the counter changes based on a positive transition of the clock input. Cascading is accomplished by concatenating the output carry bar with the input carry bar of the next stage while clocking each counter in parallel. The outputs (Q0, Q1, Q2, Q3) can be reset to the low state by applying a high level to the reset (R) pin. This CMOS counter is mainly used for up/down and difference counting. Other applications include: (1) frequency synthesizer applications requiring low power consumption and/or high noise immunity, (2) analog-to-digital and digital-to-analog conversion, and (3) magnitude and sign generation.

CD74HCT32 High Speed ​​CMOS Logic Quad 2-Input OR Gate

6-Channel, 3V to 18V Buffer 16-PDIP -55 to 125

6-Channel, 2V to 5.5V Inverter 14-TSSOP -40 to 85

The MM74HC125 and MM74HC126 are general-purpose 3-state high-speed non-inverting buffers built on an advanced silicon-gate CMOS process. They feature high drive current outputs, enabling high-speed operation even when driving large bus capacitances. Such circuits have the low power consumption of CMOS circuits, but still have high speed compared to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs. The MM74HC125 requires a 3-state control input C high to place the output in a high impedance state, while the MM74HC126 requires the control input to be low in order to place the output in a high impedance state. Protect all inputs from electrostatic discharge damage by diode-connecting VCC and ground.

The PCA9306 is a dual-bidirectional I2C-bus and SMBus voltage-level translator with enable (EN) input.

The FXLA104 is a configurable dual-voltage supply translator for unidirectional and bidirectional voltage translation between two logic levels. The device enables voltage translation between as high as 3.6V and as low as 1.1V. The A port tracks the VCCA level and the B port tracks the VCCB level. Bidirectional voltage translation between multiple voltage levels: 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V. As long as either VCC = 0V, the device remains tri-stated, allowing either VCC to power up first. If either VCC is removed, an internal power-down control circuit places the device in 3-state. When the /OE input is high, it places both the A and B ports in a 3-state state, disabling them. The /OE input is provided by VCCA. The FXLA104 supports bidirectional translation and does not require a direction control pin. Both ports of the device feature automatic orientation sensing. Either port senses an input signal and transmits it as an output signal to the other port.

Printing: V138

Belonging series of logic circuit: 74LS Logic type: NAND gate Number of channels: 1 Number of inputs per channel: 8 Power supply voltage: 4.75V~5.25V Quiescent current (maximum value): 500uA 8-input positive NAND gate

SN74HC166 8-Bit Parallel Load Shift Register