RTC clock synchronization buffer driver delay chip

3.3-V PLL clock driver with 10 outputs for DRAM applications 24-TSSOP 0 to 85

The MC10LVEP11 is a differential 1:2 fanout buffer. This device has the same pinout and functionality as the EP11 device. The LVEP11 has the same ac performance as the EP11 device for applications requiring lower voltages. Single-ended CLK input operation is limited to VCC >= 3.0 V in PECL mode and VEE <= -3.0 V in NECL mode. The 100 series includes temperature compensation.