RTC clock synchronization buffer driver delay chip

The NB6L56 is a high performance dual 2:1 differential clock or data multiplexer. The multilevel differential inputs incorporate internal 50 Ω termination resistors and are accessible through the VT pin. This feature enables the NB6L56 to accept various differential logic level standards such as LVPECL, CML or LVDS. The output is an 800 mV LVPECL signal.